In this paper a novel ultra-low voltage (ULV) standard-cell-based comparator which provides rail-to-rail input common-mode range (ICMR) is presented. The topology, unlike the others in the literature, uses only 2-inputs NAND gates and is able to operate with supply voltages as low as 0.15V. A detailed theoretical analysis based on transistor level modeling is provided to explain the operating principle and highlight the performance advantages of the proposed comparator. The circuit has been tested through several simulations, including corner analysis and Monte Carlo runs, by using three different technologies: 180 nm, 130 nm and 28 nm for both a supply voltage of 0.3 V and 0.15 V. The results found not only confirm the robustness of the proposed comparator, but also demonstrate very advantageous performances. Indeed, for the same technology node it exhibits the highest speed and the lowest EDP (about ten times lower than the one of the others standard-cell-based comparators in the literature). It exhibits also the lowest power consumption and silicon area.
Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications / Sala, Riccardo Della; Centurelli, Francesco; Scotti, Giuseppe; Palumbo, Gaetano. - In: IEEE ACCESS. - ISSN 2169-3536. - 12:(2024), pp. 4642-4659. [10.1109/ACCESS.2023.3349244]
Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications
Sala, Riccardo Della;Centurelli, Francesco;Scotti, Giuseppe;
2024
Abstract
In this paper a novel ultra-low voltage (ULV) standard-cell-based comparator which provides rail-to-rail input common-mode range (ICMR) is presented. The topology, unlike the others in the literature, uses only 2-inputs NAND gates and is able to operate with supply voltages as low as 0.15V. A detailed theoretical analysis based on transistor level modeling is provided to explain the operating principle and highlight the performance advantages of the proposed comparator. The circuit has been tested through several simulations, including corner analysis and Monte Carlo runs, by using three different technologies: 180 nm, 130 nm and 28 nm for both a supply voltage of 0.3 V and 0.15 V. The results found not only confirm the robustness of the proposed comparator, but also demonstrate very advantageous performances. Indeed, for the same technology node it exhibits the highest speed and the lowest EDP (about ten times lower than the one of the others standard-cell-based comparators in the literature). It exhibits also the lowest power consumption and silicon area.File | Dimensione | Formato | |
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